1. Field of the Invention
The present invention relates to a probe card used to detect the electrical characteristics and defects of a semiconductor device, such as an integrated circuit formed on a semiconductor wafer, and more particularly, to a probe card for testing high-frequency digital signals or analog signals.
2. Description of the Related Art
Typically, the electrical characteristics of semiconductor devices such as an integrated circuit are tested when semiconductor devices are formed on a wafer. That is, if a semiconductor integrated circuit is found to have detects after being packaged, the packaging process is wasted. Thus, the electrical characteristics of the semiconductor integrated circuit are tested when the semiconductor integrated circuit is disposed on a wafer before chips are cut. In order to test electrical characteristics, first, a needle of a probe card contacts an external contact terminal of an integrated circuit such as a wafer pad; an electric signal is input from an electrical characteristics testing apparatus to the integrated circuit through the needle; and then an output wave signal is received by the electrical characteristics testing apparatus from the integrated circuit.
FIG. 1 is a schematic diagram of a conventional cantilever probe card.
Referring to FIG. 1, a needle 20 electrically connected to a printed circuit board (PCB) 10 is fixed by an epoxy ring 30. The needle 20 is composed of tungsten and is electrically connected to a signal line (not shown) formed in the PCB 10 by, for example, soldering. The needle 20 extends 5 mm from the inner circumference of the epoxy ring 30 so that a wafer can be supported by elastic force of the needle 20.
Since signal lines in the PCB 10 can be multi-layered, impedance matching can be realized. Therefore, when signals are transferred at high rates, noise generated by, for example, reflection and crosstalk can be removed. However, it is difficult to obtain impedance matching between the signal lines of the PCB 10 and an end of the needle 20, and thus, electric parasitic inductance occurs. A current signal from the integrated circuit being tested is interrupted by the parasitic inductance of the needle 20 and thus, an increase or decrease of the output of the integrated circuit is delayed. In addition, as a measurement frequency increases, the parasitic inductance further degrades transferring characteristics. The conventional probe card illustrated in FIG. 1 is suitable for a direct current (DC) test with a frequency of less than 100 MHz, but is not suitable for testing an analog device or logic devices with a frequency greater than 500 MHz. That is, the conventional cantilever probe card is not suitable for testing high speed characteristics of an integrated circuit.
However, the parasitic inductance can be decreased by reducing the length of the needle 20, thus decreasing transfer loss. However, the needle 20 must be of at least a standard length or longer. As illustrated in FIG. 1, the needle 20 can be divided into three portions 20a, 20b, and 20c. The portion 20a of the needle 20 contacts a wafer pad. The portion 20b of the needle 20 is surrounded by the epoxy ring 30 to be attached to the PCB 10. The portion of 20c of the needle 20 is connected to the signal line of the PCB 10. In this case, a length L1 of the portion 20a cannot be reduced because elastic force must be maintained, a length L2 of the portion 20b cannot be reduced because the needle 20 must be completely fixed in the epoxy ring 30, and a length L3 of the portion 20c cannot be reduced because adjacent needles 20 can be bridged to each other. Rather, the length of the needle 20 must be increased to test chips on a wafer before cutting them. Therefore, RF devices operating at a range of hundreds of MHz to a few GHz and high speed logic devices cannot be tested before packing, thus decreasing productivity.
Although probe cards not including needles have been developed to test RF devices operating at a range of hundreds of MHz to a few GHz, or high speed logic devices, the manufacturing process is complex, long, and expensive. For example, the manufacturing costs for probe cards not including needles are tens times higher than the manufacturing costs for probe cards including tungsten needles. In addition, the repair of probe cards during mass production requires a long time. Therefore, it is difficult to achieve the development and mass production of a probe card not including needles.
In addition, a portion of the needle can be surrounded by an insulating material and a metallic structure to thus form a coaxial cable so that the inductance of the needle can be decreased. In this case, however, the manufacturing costs are high because holes in which the needle and the insulating material are filled must be made in the metallic structure.